Miniaturization of metal columns such as through-silicon vias (TSVs) which are penetration electrodes that pass through semiconductor substrates and bumps for connecting semiconductor chips is required to realize miniaturization of 3-dimensional integrated circuits.
Patent Documents 1 and 2 disclose techniques for forming fine periodic patterns using self-organizing polymers. Non-Patent Document 1 discloses a technique for heating an anisotropic conductive paste in which solder particles are dispersed so that the solder particles agglomerate in an electrode portion and a metallic bond is formed between the electrode and the solder.